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E TEC20BME 0115.pdf E TEC20aME 0111.pdf X klop/MECHATRONICS/AI G20Electrunius/Past%20year%20questi STEC20BAE 0114 pdl Question 5 (20 marks) A JFET amplifier circuit with voltage divider biasing is configured as shown in the figure below. The supply voltage VD is 20. The JFET has the following parameters: DD DSS 25mA and V -4V, The JFET is biased with V 0V and V 0.5V The small signal input impedance is 10km and the value of the load resistor RL is 10kn. DD DD o out in Fig. 5 (a) State the configuration of this amplifier. 2 marks (b) Draw the small signal ac equivalent circuit of this amplifier. 4 marks (c) Calculate the value of Rs. 6 marks (d) Calculate the values of R1 and R 6 marks (e) Calculate the voltage gain of this amplifier. State your assumption where 12 marks necessary. 2:27 PM 303/20

please provide a clear, neat and detailed answer. thank you in advance

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